1. Field of the Invention
The present invention relates to a test key in a semiconductor substrate, and more particularly, to a test key having a chain circuit and a Kelvin structure.
2. Description of the Prior Art
In semiconductor fabrication, a semiconductor device or an integrated circuit (IC) is continuously tested in every step so as to maintain device quality. Normally a testing circuit is simultaneously fabricated with an actual device so that the quality of the actual device is judged by the performance of the testing circuit. The quality of the actual device therefore is well controlled. Moreover, because of the advanced semiconductor technology, the number of transistors in a single chip is grown so that the amount of the vias for interconnecting the transistors is increased rapidly. In order to handle the yield of the semiconductor products, how to accurately measure the resistances of the vias has been an important issue.
Please refer to FIG. 1, which is a schematic diagram of a test key 10 according to the prior art. The test key 10 has a Kelvin structure that is used to measure the resistance of a via 12. The test key is formed on a semiconductor substrate and comprises a first pad 14, a second pad 16, a third pad 18, a fourth pad 20, and two wires 22, 24. The via 12 is connected with the four pad 14–20 via the two wires. When measuring the resistance of the via 12, four probes of a probe card are used to contact the four pads 14–20 respectively. The probe card provides a test current I to the test key 10 via the first pad 14 and the second pad 16. The test current I flows through the via 12. Meanwhile, the probe card measures the voltage gap between the two ends of the via 12 by contacting the third pad 18 and the fourth pad 20. Then, the resistance of the via 12 is calculated according to the test current I and the measured voltage gap between the two ends of the via 12. However, because of the single via 12, the test key 10 has etching loading effect.
Please refer to FIGS. 2–3. FIG. 2 is a layout diagram of another test key 30 according to the prior art, and FIG. 3 is sectional diagram of the test key 30. The test key 30 is formed on a semiconductor substrate and has a chain structure. The test key 30 comprises a first pad 32, a second pad 34, a plurality of electronic components 36, a plurality of conductors 38, and a plurality of vias 40. The conductors 38 are metal wires, and the electronic components 36 are diffusion areas or metal wires under the conductors 38. The vias 40 connect the first pad 32, the second pad 34, the electronic components 36, and the conductors 38 together. Therefore, the first pad 32, the electronic components 36, the conductors 38, the vias 40, and the second pad 34 are connected in series as a chain circuit. And, the first pad 32 and the second pad 34 are respectively positioned at the two ends of the chain circuit. When testing the test key 30, two probes of a probe card contact the first pad 32 and the second pad 34 to supply a test voltage to the first pad 32. Normally, as shown in FIG. 3, a test current I flows through the electronic components 36, the vias 40, and the conductors 38. The probe card measures the test current I so as to calculate the equivalent resistance between the first pad 32 and the second pad 34. And then, the probe card estimates the resistance of each via 40 according to the equivalent resistance between the first pad 32 and the second pad 34. Even the test key 30 has no etching loading effect, but the estimated resistance of each via 40 is not very accurate. The application of the estimated resistance of each via 40 is not very practical.